A Brief Survey of Memory Bank Parallelism
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A short survey note on Memory Bank Parallelism, covering the basic idea of bank-level parallelism and its performance impact in memory systems.
Read on ZhihuNotes on systems research surveys, paper reading, and short research observations.
Structured notes for understanding a research area, comparing systems, and finding open questions.
Published:
A short survey note on Memory Bank Parallelism, covering the basic idea of bank-level parallelism and its performance impact in memory systems.
Read on ZhihuReading notes that summarize problems, methods, experiments, and takeaways from papers.
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A paper reading note on application-aware memory channel partitioning for reducing memory interference in multicore systems.
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A paper reading note on CXL-DMSim, a full-system CXL disaggregated-memory simulator with silicon validation.
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A paper reading note on sharing-aware caching for multi-chip GPUs.
Read on ZhihuShort notes for ideas, questions, design tradeoffs, and research intuition.
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A short note on CXL memory interleaving and the address-mapping mechanisms behind it.
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A short note on using the Roofline model to reason about performance bottlenecks and design tradeoffs in computer systems.
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A short note on Transformer acceleration and the system-design tradeoffs behind AI accelerators.
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